as good as i can get it

minor edits to force new Travis test (last one timed out)

Update u8g_com_HAL_DUE_st7920_sw_spi.cpp

initial power up display garbage gone

Marlin/src/HAL/HAL_DUE/u8g_com_HAL_DUE_st7920_sw_spi.cpp

 
 */
 
-#ifdef __SAM3X8E__
+#ifdef ARDUINO_ARCH_SAM
 
 #include <U8glib.h>
 #include <Arduino.h>
       MOSI_pPio->PIO_SODR = MOSI_dwMask;
     else
       MOSI_pPio->PIO_CODR = MOSI_dwMask;
-    val = val << 1;
-    __delay_4cycles(2);
+    __delay_4cycles(1);
     SCK_pPio->PIO_SODR = SCK_dwMask;
-    __delay_4cycles(22);
+    __delay_4cycles(19); // 16 dead, 17 garbage, 18/0 900kHz, 19/1 825k, 20/1 800k, 21/2 725KHz
+    val <<= 1;
     SCK_pPio->PIO_CODR = SCK_dwMask;
   }
 }
        /* data */
       spiSend_sw_DUE(0x0fa);
 
-    for( i = 0; i < 4; i++ )   // give the controller some time to process the data
-      u8g_10MicroDelay();      // 2 is bad, 3 is OK, 4 is safe
+    for (i = 0; i < 4; i++)   // give the controller some time to process the data
+      u8g_10MicroDelay();     // 2 is bad, 3 is OK, 4 is safe
   }
 
   spiSend_sw_DUE(val & 0x0f0);
       u8g_SetPILevel_DUE(u8g, U8G_PI_SCK, 0);
       u8g_SetPIOutput_DUE(u8g, U8G_PI_SCK);
       u8g_SetPILevel_DUE(u8g, U8G_PI_MOSI, 0);
-      u8g_SetPILevel_DUE(u8g, U8G_PI_MOSI, 1);
       u8g_SetPIOutput_DUE(u8g, U8G_PI_MOSI);
+      
+      SCK_pPio->PIO_CODR = SCK_dwMask;   //SCK low - needed at power up but not after reset
+      MOSI_pPio->PIO_CODR = MOSI_dwMask; //MOSI low - needed at power up but not after reset
+      
       u8g_Delay(5);
+
       u8g->pin_list[U8G_PI_A0_STATE] = 0;       /* inital RS state: command mode */
       break;
 
   return 1;
 }
 
-#pragma GCC reset_options
-
 #endif  //ARDUINO_ARCH_SAM

Marlin/src/lcd/dogm/u8g_dev_st7920_128x64_HAL.cpp

   U8G_ESC_END                /* end of sequence */
 };
 
+void clear_graphics_DRAM(u8g_t *u8g, u8g_dev_t *dev){
+  u8g_SetChipSelect(u8g, dev, 1);
+  u8g_Delay(1);
+  u8g_SetAddress(u8g, dev, 0);         // cmd mode
+  u8g_WriteByte(u8g, dev, 0x08);       //display off, cursor+blink off
+  u8g_WriteByte(u8g, dev, 0x3E);       //extended mode + GDRAM active
+  for (uint8_t y = 0; y < (HEIGHT) / 2; y++) { //clear GDRAM
+    u8g_WriteByte(u8g, dev, 0x80 | y); //set y
+    u8g_WriteByte(u8g, dev, 0x80);     //set x = 0
+    u8g_SetAddress(u8g, dev, 1);                  /* data mode */
+    for (uint8_t i = 0; i < 2 * (WIDTH) / 8; i++) //2x width clears both segments
+      u8g_WriteByte(u8g, dev, 0);
+    u8g_SetAddress(u8g, dev, 0);           /* cmd mode */
+  }
+
+  u8g_WriteByte(u8g, dev, 0x0C); //display on, cursor+blink off
+
+  u8g_SetChipSelect(u8g, dev, 0);
+
+}
+
 uint8_t u8g_dev_st7920_128x64_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
 {
   switch(msg)
     case U8G_DEV_MSG_INIT:
       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_128x64_HAL_init_seq);
+      clear_graphics_DRAM(u8g, dev);
       break;
     case U8G_DEV_MSG_STOP:
       break;
     case U8G_DEV_MSG_INIT:
       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_128x64_HAL_init_seq);
+      clear_graphics_DRAM(u8g, dev);
       break;
 
     case U8G_DEV_MSG_STOP: