|
@@ -94,7 +94,7 @@ block_t* Stepper::current_block = NULL; // A pointer to the block currently bei
|
94
|
94
|
// private:
|
95
|
95
|
|
96
|
96
|
uint8_t Stepper::last_direction_bits = 0; // The next stepping-bits to be output
|
97
|
|
-uint16_t Stepper::cleaning_buffer_counter = 0;
|
|
97
|
+int16_t Stepper::cleaning_buffer_counter = 0;
|
98
|
98
|
|
99
|
99
|
#if ENABLED(X_DUAL_ENDSTOPS)
|
100
|
100
|
bool Stepper::locked_x_motor = false;
|
|
@@ -341,10 +341,8 @@ HAL_STEP_TIMER_ISR {
|
341
|
341
|
|
342
|
342
|
void Stepper::isr() {
|
343
|
343
|
|
344
|
|
- hal_timer_t ocr_val;
|
345
|
|
-
|
346
|
|
- #define ENDSTOP_NOMINAL_OCR_VAL 1500 * HAL_TICKS_PER_US // check endstops every 1.5ms to guarantee two stepper ISRs within 5ms for BLTouch
|
347
|
|
- #define OCR_VAL_TOLERANCE 500 * HAL_TICKS_PER_US // First max delay is 2.0ms, last min delay is 0.5ms, all others 1.5ms
|
|
344
|
+ #define ENDSTOP_NOMINAL_OCR_VAL 1500 * HAL_TICKS_PER_US // Check endstops every 1.5ms to guarantee two stepper ISRs within 5ms for BLTouch
|
|
345
|
+ #define OCR_VAL_TOLERANCE 500 * HAL_TICKS_PER_US // First max delay is 2.0ms, last min delay is 0.5ms, all others 1.5ms
|
348
|
346
|
|
349
|
347
|
#if DISABLED(LIN_ADVANCE)
|
350
|
348
|
// Disable Timer0 ISRs and enable global ISR again to capture UART events (incoming chars)
|
|
@@ -355,6 +353,7 @@ void Stepper::isr() {
|
355
|
353
|
#endif
|
356
|
354
|
#endif
|
357
|
355
|
|
|
356
|
+ hal_timer_t ocr_val;
|
358
|
357
|
static uint32_t step_remaining = 0; // SPLIT function always runs. This allows 16 bit timers to be
|
359
|
358
|
// used to generate the stepper ISR.
|
360
|
359
|
#define SPLIT(L) do { \
|
|
@@ -367,42 +366,45 @@ void Stepper::isr() {
|
367
|
366
|
ocr_val = L;\
|
368
|
367
|
}while(0)
|
369
|
368
|
|
|
369
|
+ // Time remaining before the next step?
|
370
|
370
|
if (step_remaining) {
|
371
|
|
- if (ENDSTOPS_ENABLED)
|
372
|
|
- endstops.update();
|
373
|
|
- if (step_remaining > ENDSTOP_NOMINAL_OCR_VAL) {
|
374
|
|
- step_remaining -= ENDSTOP_NOMINAL_OCR_VAL;
|
375
|
|
- ocr_val = ENDSTOP_NOMINAL_OCR_VAL;
|
376
|
|
- }
|
377
|
|
- else {
|
378
|
|
- ocr_val = step_remaining;
|
379
|
|
- step_remaining = 0; // last one before the ISR that does the step
|
380
|
|
- }
|
381
|
371
|
|
|
372
|
+ // Make sure endstops are updated
|
|
373
|
+ if (ENDSTOPS_ENABLED) endstops.update();
|
|
374
|
+
|
|
375
|
+ // Next ISR either for endstops or stepping
|
|
376
|
+ ocr_val = step_remaining <= ENDSTOP_NOMINAL_OCR_VAL ? step_remaining : ENDSTOP_NOMINAL_OCR_VAL;
|
|
377
|
+ step_remaining -= ocr_val;
|
382
|
378
|
_NEXT_ISR(ocr_val);
|
383
|
379
|
|
384
|
|
- #if DISABLED(LIN_ADVANCE)
|
385
|
|
- #ifdef CPU_32_BIT
|
386
|
|
- HAL_timer_set_count(STEP_TIMER_NUM, ocr_val);
|
387
|
|
- #else
|
388
|
|
- NOLESS(OCR1A, TCNT1 + 16);
|
|
380
|
+ #if DISABLED(LIN_ADVANCE)
|
|
381
|
+ #ifdef CPU_32_BIT
|
|
382
|
+ HAL_timer_set_count(STEP_TIMER_NUM, ocr_val);
|
|
383
|
+ #else
|
|
384
|
+ NOLESS(OCR1A, TCNT1 + 16);
|
|
385
|
+ #endif
|
|
386
|
+ HAL_ENABLE_ISRs(); // re-enable ISRs
|
389
|
387
|
#endif
|
390
|
|
- HAL_ENABLE_ISRs(); // re-enable ISRs
|
391
|
|
- #endif
|
392
|
388
|
|
393
|
389
|
return;
|
394
|
390
|
}
|
395
|
391
|
|
396
|
|
-
|
|
392
|
+ //
|
|
393
|
+ // When cleaning, discard the current block and run fast
|
|
394
|
+ //
|
397
|
395
|
if (cleaning_buffer_counter) {
|
398
|
|
- --cleaning_buffer_counter;
|
|
396
|
+ if (cleaning_buffer_counter < 0)
|
|
397
|
+ ++cleaning_buffer_counter; // Count up for endstop hit
|
|
398
|
+ else {
|
|
399
|
+ --cleaning_buffer_counter; // Count down for abort print
|
|
400
|
+ #ifdef SD_FINISHED_RELEASECOMMAND
|
|
401
|
+ if (!cleaning_buffer_counter && (SD_FINISHED_STEPPERRELEASE)) enqueue_and_echo_commands_P(PSTR(SD_FINISHED_RELEASECOMMAND));
|
|
402
|
+ #endif
|
|
403
|
+ }
|
399
|
404
|
current_block = NULL;
|
400
|
405
|
planner.discard_current_block();
|
401
|
|
- #ifdef SD_FINISHED_RELEASECOMMAND
|
402
|
|
- if (!cleaning_buffer_counter && (SD_FINISHED_STEPPERRELEASE)) enqueue_and_echo_commands_P(PSTR(SD_FINISHED_RELEASECOMMAND));
|
403
|
|
- #endif
|
404
|
|
- _NEXT_ISR(HAL_STEPPER_TIMER_RATE / 10000); // Run at max speed - 10 KHz
|
405
|
|
- HAL_ENABLE_ISRs(); // re-enable ISRs
|
|
406
|
+ _NEXT_ISR(HAL_STEPPER_TIMER_RATE / 10000); // Run at max speed - 10 KHz
|
|
407
|
+ HAL_ENABLE_ISRs(); // Re-enable ISRs
|
406
|
408
|
return;
|
407
|
409
|
}
|
408
|
410
|
|