Browse Source

Spacing, macros in LPC1768_PWM

Scott Lahteine 7 years ago
parent
commit
c8718aa111
1 changed files with 54 additions and 52 deletions
  1. 54
    52
      Marlin/src/HAL/HAL_LPC1768/LPC1768_PWM.cpp

+ 54
- 52
Marlin/src/HAL/HAL_LPC1768/LPC1768_PWM.cpp View File

@@ -153,11 +153,13 @@ void LPC1768_PWM_update_map_MR(void) {
153 153
   map_MR[0] = { 0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + P1_18_PWM_channel) ? 1 : 0), P1_18, &LPC_PWM1->MR1, 0, 0, 0 };
154 154
   map_MR[1] = { 0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + P1_20_PWM_channel) ? 1 : 0), P1_20, &LPC_PWM1->MR2, 0, 0, 0 };
155 155
   map_MR[2] = { 0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + P1_21_PWM_channel) ? 1 : 0), P1_21, &LPC_PWM1->MR3, 0, 0, 0 };
156
-  #if MOTHERBOARD == BOARD_MKS_SBASE
157
-    map_MR[3] = { 0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + P1_23_PWM_channel) ? 1 : 0), P1_23, &LPC_PWM1->MR4, 0, 0, 0 };
158
-  #else
159
-    map_MR[3] = { 0, 0, P_NC, &LPC_PWM1->MR4, 0, 0, 0 };
160
-  #endif
156
+  map_MR[3] = {
157
+    #if MB(MKS_SBASE)
158
+      0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + P1_23_PWM_channel) ? 1 : 0), P1_23, &LPC_PWM1->MR4, 0, 0, 0
159
+    #else
160
+      0, 0, P_NC, &LPC_PWM1->MR4, 0, 0, 0
161
+    #endif
162
+  };
161 163
   map_MR[4] = { 0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + P2_04_PWM_channel) ? 1 : 0), P2_04, &LPC_PWM1->MR5, 0, 0, 0 };
162 164
   map_MR[5] = { 0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + P2_05_PWM_channel) ? 1 : 0), P2_05, &LPC_PWM1->MR6, 0, 0, 0 };
163 165
 }
@@ -212,7 +214,7 @@ void LPC1768_PWM_init(void) {
212 214
   LPC_PWM1->MR0  = LPC_PWM1_MR0;                                          // TC resets every 19,999 + 1 cycles - sets PWM cycle(Ton+Toff) to 20 mS
213 215
   // MR0 must be set before TCR enables the PWM
214 216
   LPC_PWM1->TCR  = _BV(SBIT_CNTEN) | _BV(SBIT_CNTRST) | _BV(SBIT_PWMEN);  // Enable counters, reset counters, set mode to PWM
215
-  LPC_PWM1->TCR  &= ~(_BV(SBIT_CNTRST));                                  // Take counters out of reset
217
+  CBI(LPC_PWM1->TCR, SBIT_CNTRST);                                        // Take counters out of reset
216 218
   LPC_PWM1->PR   =  LPC_PWM1_PR;
217 219
   LPC_PWM1->MCR  = _BV(SBIT_PWMMR0R) | _BV(0);                            // Reset TC if it matches MR0, disable all interrupts except for MR0
218 220
   LPC_PWM1->CTCR = 0;                                                     // Disable counter mode (enable PWM mode)
@@ -279,47 +281,47 @@ bool LPC1768_PWM_detach_pin(pin_t pin) {
279 281
 
280 282
   // OK to make these changes before the MR0 interrupt
281 283
   switch(pin) {
282
-    case P1_23:                        // MKS Sbase Servo 0, PWM1 channel 4  (J3-8 PWM1.4)
283
-      LPC_PWM1->PCR &= ~(_BV(8 + P1_23_PWM_channel));                 // disable PWM1 module control of this pin
284
+    case P1_23:                                       // MKS Sbase Servo 0, PWM1 channel 4  (J3-8 PWM1.4)
285
+      CBI(LPC_PWM1->PCR, 8 + P1_23_PWM_channel);      // disable PWM1 module control of this pin
284 286
       map_MR[P1_23_PWM_channel - 1].PCR_bit = 0;
285
-      LPC_PINCON->PINSEL3 &= ~(0x3 <<  14);    // return pin to general purpose I/O
287
+      LPC_PINCON->PINSEL3 &= ~(0x3 <<  14);           // return pin to general purpose I/O
286 288
       map_MR[P1_23_PWM_channel - 1].PINSEL_bits = 0;
287
-      map_MR[P1_23_PWM_channel - 1].map_PWM_INT = 0;               // 0 - available for interrupts, 1 - in use by PWM
289
+      map_MR[P1_23_PWM_channel - 1].map_PWM_INT = 0;  // 0 - available for interrupts, 1 - in use by PWM
288 290
       break;
289
-    case P1_20:                        // Servo 0, PWM1 channel 2  (Pin 11  P1.20 PWM1.2)
290
-      LPC_PWM1->PCR &= ~(_BV(8 + P1_20_PWM_channel));                 // disable PWM1 module control of this pin
291
+    case P1_20:                                       // Servo 0, PWM1 channel 2  (Pin 11  P1.20 PWM1.2)
292
+      CBI(LPC_PWM1->PCR, 8 + P1_20_PWM_channel);      // disable PWM1 module control of this pin
291 293
       map_MR[P1_20_PWM_channel - 1].PCR_bit = 0;
292
-      LPC_PINCON->PINSEL3 &= ~(0x3 <<  8);    // return pin to general purpose I/O
294
+      LPC_PINCON->PINSEL3 &= ~(0x3 <<  8);            // return pin to general purpose I/O
293 295
       map_MR[P1_20_PWM_channel - 1].PINSEL_bits = 0;
294
-      map_MR[P1_20_PWM_channel - 1].map_PWM_INT = 0;               // 0 - available for interrupts, 1 - in use by PWM
296
+      map_MR[P1_20_PWM_channel - 1].map_PWM_INT = 0;  // 0 - available for interrupts, 1 - in use by PWM
295 297
       break;
296
-    case P1_21:                        // Servo 1, PWM1 channel 3  (Pin 6  P1.21 PWM1.3)
297
-      LPC_PWM1->PCR &= ~(_BV(8 + P1_21_PWM_channel));                  // disable PWM1 module control of this pin
298
+    case P1_21:                                       // Servo 1, PWM1 channel 3  (Pin 6  P1.21 PWM1.3)
299
+      CBI(LPC_PWM1->PCR, 8 + P1_21_PWM_channel);      // disable PWM1 module control of this pin
298 300
       map_MR[P1_21_PWM_channel - 1].PCR_bit = 0;
299
-      LPC_PINCON->PINSEL3 &= ~(0x3 << 10);  // return pin to general purpose I/O
301
+      LPC_PINCON->PINSEL3 &= ~(0x3 << 10);            // return pin to general purpose I/O
300 302
       map_MR[P1_21_PWM_channel - 1].PINSEL_bits = 0;
301
-      map_MR[P1_21_PWM_channel - 1].map_PWM_INT = 0;                // 0 - available for interrupts, 1 - in use by PWM
303
+      map_MR[P1_21_PWM_channel - 1].map_PWM_INT = 0;  // 0 - available for interrupts, 1 - in use by PWM
302 304
       break;
303
-    case P1_18:                        // Servo 3, PWM1 channel 1 (Pin 4  P1.18 PWM1.1)
304
-      LPC_PWM1->PCR &= ~(_BV(8 + P1_18_PWM_channel));                  // disable PWM1 module control of this pin
305
+    case P1_18:                                       // Servo 3, PWM1 channel 1 (Pin 4  P1.18 PWM1.1)
306
+      CBI(LPC_PWM1->PCR, 8 + P1_18_PWM_channel);      // disable PWM1 module control of this pin
305 307
       map_MR[P1_18_PWM_channel - 1].PCR_bit =  0;
306
-      LPC_PINCON->PINSEL3 &= ~(0x3 <<  4);  // return pin to general purpose I/O
308
+      LPC_PINCON->PINSEL3 &= ~(0x3 <<  4);            // return pin to general purpose I/O
307 309
       map_MR[P1_18_PWM_channel - 1].PINSEL_bits =  0;
308
-      map_MR[P1_18_PWM_channel - 1].map_PWM_INT = 0;                // 0 - available for interrupts, 1 - in use by PWM
310
+      map_MR[P1_18_PWM_channel - 1].map_PWM_INT = 0;  // 0 - available for interrupts, 1 - in use by PWM
309 311
       break;
310
-    case P2_04:                        // D9 FET, PWM1 channel 5  (Pin 9  P2_04 PWM1.5)
311
-      LPC_PWM1->PCR &= ~(_BV(8 + P2_04_PWM_channel));                  // disable PWM1 module control of this pin
312
+    case P2_04:                                       // D9 FET, PWM1 channel 5  (Pin 9  P2_04 PWM1.5)
313
+      CBI(LPC_PWM1->PCR, 8 + P2_04_PWM_channel);      // disable PWM1 module control of this pin
312 314
       map_MR[P2_04_PWM_channel - 1].PCR_bit = 0;
313
-      LPC_PINCON->PINSEL4 &= ~(0x3 << 10);  // return pin to general purpose I/O
315
+      LPC_PINCON->PINSEL4 &= ~(0x3 << 10);            // return pin to general purpose I/O
314 316
       map_MR[P2_04_PWM_channel - 1].PINSEL_bits = 0;
315
-      map_MR[P2_04_PWM_channel - 1].map_PWM_INT = 0;                // 0 - available for interrupts, 1 - in use by PWM
317
+      map_MR[P2_04_PWM_channel - 1].map_PWM_INT = 0;  // 0 - available for interrupts, 1 - in use by PWM
316 318
       break;
317
-    case P2_05:                        // D10 FET, PWM1 channel 6 (Pin 10  P2_05 PWM1.6)
318
-      LPC_PWM1->PCR &= ~(_BV(8 + P2_05_PWM_channel));                  // disable PWM1 module control of this pin
319
+    case P2_05:                                       // D10 FET, PWM1 channel 6 (Pin 10  P2_05 PWM1.6)
320
+      CBI(LPC_PWM1->PCR, 8 + P2_05_PWM_channel);      // disable PWM1 module control of this pin
319 321
       map_MR[P2_05_PWM_channel - 1].PCR_bit =  0;
320
-      LPC_PINCON->PINSEL4 &= ~(0x3 <<  4);  // return pin to general purpose I/O
322
+      LPC_PINCON->PINSEL4 &= ~(0x3 <<  4);            // return pin to general purpose I/O
321 323
       map_MR[P2_05_PWM_channel - 1].PINSEL_bits =  0;
322
-      map_MR[P2_05_PWM_channel - 1].map_PWM_INT = 0;                // 0 - available for interrupts, 1 - in use by PWM
324
+      map_MR[P2_05_PWM_channel - 1].map_PWM_INT = 0;  // 0 - available for interrupts, 1 - in use by PWM
323 325
       break;
324 326
     default:
325 327
       break;
@@ -351,35 +353,35 @@ bool LPC1768_PWM_write(pin_t pin, uint32_t value) {
351 353
   LPC1768_PWM_update_map_MR();
352 354
 
353 355
   switch(pin) {
354
-    case P1_23:                        // MKS Sbase Servo 0, PWM1 channel 4  (J3-8 PWM1.4)
355
-      map_MR[P1_23_PWM_channel - 1].PCR_bit = _BV(8 + P1_23_PWM_channel);  // enable PWM1 module control of this pin
356
+    case P1_23:                                                           // MKS Sbase Servo 0, PWM1 channel 4  (J3-8 PWM1.4)
357
+      map_MR[P1_23_PWM_channel - 1].PCR_bit = _BV(8 + P1_23_PWM_channel); // enable PWM1 module control of this pin
356 358
       map_MR[P1_23_PWM_channel - 1].PINSEL_reg = &LPC_PINCON->PINSEL3;
357
-      map_MR[P1_23_PWM_channel - 1].PINSEL_bits = 0x2 <<  14;      // ISR must do this AFTER setting PCR
359
+      map_MR[P1_23_PWM_channel - 1].PINSEL_bits = 0x2 <<  14;             // ISR must do this AFTER setting PCR
358 360
       break;
359
-    case P1_20:                        // Servo 0, PWM1 channel 2 (Pin 11  P1.20 PWM1.2)
360
-      map_MR[P1_20_PWM_channel - 1].PCR_bit = _BV(8 + P1_20_PWM_channel);  // enable PWM1 module control of this pin
361
+    case P1_20:                                                           // Servo 0, PWM1 channel 2 (Pin 11  P1.20 PWM1.2)
362
+      map_MR[P1_20_PWM_channel - 1].PCR_bit = _BV(8 + P1_20_PWM_channel); // enable PWM1 module control of this pin
361 363
       map_MR[P1_20_PWM_channel - 1].PINSEL_reg = &LPC_PINCON->PINSEL3;
362
-      map_MR[P1_20_PWM_channel - 1].PINSEL_bits = 0x2 <<  8;      // ISR must do this AFTER setting PCR
364
+      map_MR[P1_20_PWM_channel - 1].PINSEL_bits = 0x2 <<  8;              // ISR must do this AFTER setting PCR
363 365
       break;
364
-    case P1_21:                        // Servo 1, PWM1 channel 3 (Pin 6  P1.21 PWM1.3)
365
-      map_MR[P1_21_PWM_channel - 1].PCR_bit = _BV(8 + P1_21_PWM_channel);                  // enable PWM1 module control of this pin
366
+    case P1_21:                                                           // Servo 1, PWM1 channel 3 (Pin 6  P1.21 PWM1.3)
367
+      map_MR[P1_21_PWM_channel - 1].PCR_bit = _BV(8 + P1_21_PWM_channel); // enable PWM1 module control of this pin
366 368
       map_MR[P1_21_PWM_channel - 1].PINSEL_reg = &LPC_PINCON->PINSEL3;
367
-      map_MR[P1_21_PWM_channel - 1].PINSEL_bits = 0x2 << 10;       // ISR must do this AFTER setting PCR
369
+      map_MR[P1_21_PWM_channel - 1].PINSEL_bits = 0x2 << 10;              // ISR must do this AFTER setting PCR
368 370
       break;
369
-    case P1_18:                        // Servo 3, PWM1 channel 1 (Pin 4  P1.18 PWM1.1)
370
-      map_MR[P1_18_PWM_channel - 1].PCR_bit = _BV(8 + P1_18_PWM_channel);                  // enable PWM1 module control of this pin
371
+    case P1_18:                                                           // Servo 3, PWM1 channel 1 (Pin 4  P1.18 PWM1.1)
372
+      map_MR[P1_18_PWM_channel - 1].PCR_bit = _BV(8 + P1_18_PWM_channel); // enable PWM1 module control of this pin
371 373
       map_MR[P1_18_PWM_channel - 1].PINSEL_reg = &LPC_PINCON->PINSEL3;
372
-      map_MR[P1_18_PWM_channel - 1].PINSEL_bits = 0x2 <<  4;       // ISR must do this AFTER setting PCR
374
+      map_MR[P1_18_PWM_channel - 1].PINSEL_bits = 0x2 <<  4;              // ISR must do this AFTER setting PCR
373 375
       break;
374
-    case P2_04:                        // D9 FET, PWM1 channel 5 (Pin 9  P2_04 PWM1.5)
375
-      map_MR[P2_04_PWM_channel - 1].PCR_bit = _BV(8 + P2_04_PWM_channel);                  // enable PWM1 module control of this pin
376
+    case P2_04:                                                           // D9 FET, PWM1 channel 5 (Pin 9  P2_04 PWM1.5)
377
+      map_MR[P2_04_PWM_channel - 1].PCR_bit = _BV(8 + P2_04_PWM_channel); // enable PWM1 module control of this pin
376 378
       map_MR[P2_04_PWM_channel - 1].PINSEL_reg = &LPC_PINCON->PINSEL4;
377
-      map_MR[P2_04_PWM_channel - 1].PINSEL_bits = 0x1 <<  8;       // ISR must do this AFTER setting PCR
379
+      map_MR[P2_04_PWM_channel - 1].PINSEL_bits = 0x1 <<  8;              // ISR must do this AFTER setting PCR
378 380
       break;
379
-    case P2_05:                        // D10 FET, PWM1 channel 6 (Pin 10  P2_05 PWM1.6)
380
-      map_MR[P2_05_PWM_channel - 1].PCR_bit = _BV(8 + P2_05_PWM_channel);                  // enable PWM1 module control of this pin
381
+    case P2_05:                                                           // D10 FET, PWM1 channel 6 (Pin 10  P2_05 PWM1.6)
382
+      map_MR[P2_05_PWM_channel - 1].PCR_bit = _BV(8 + P2_05_PWM_channel); // enable PWM1 module control of this pin
381 383
       map_MR[P2_05_PWM_channel - 1].PINSEL_reg = &LPC_PINCON->PINSEL4;
382
-      map_MR[P2_05_PWM_channel - 1].PINSEL_bits = 0x1 << 10;       // ISR must do this AFTER setting PCR
384
+      map_MR[P2_05_PWM_channel - 1].PINSEL_bits = 0x1 << 10;              // ISR must do this AFTER setting PCR
383 385
       break;
384 386
     default:  // ISR pins
385 387
       pinMode(pin, OUTPUT);  // set pin to output
@@ -418,11 +420,11 @@ void LPC1768_PWM_update(void) {     // only called by the ISR
418 420
       found = false;
419 421
       for (uint8_t j = 0; (j < NUM_PWMS) && !found; j++) {
420 422
         if ( (map_MR[j].map_PWM_PIN == ISR_table[i].pin)) {
421
-          map_MR[j].map_PWM_INT = 1;                            // flag that it's already setup for direct control
423
+          map_MR[j].map_PWM_INT = 1;                          // flag that it's already setup for direct control
422 424
           ISR_table[i].PWM_mask = 0;
423
-          ISR_table[i].PCR_bit = map_MR[j].PCR_bit;            // PCR register bit to enable PWM1 control of this pin
424
-          ISR_table[i].PINSEL_reg = map_MR[j].PINSEL_reg;  // PINSEL register address to set pin mode to PWM1 control} MR_map;
425
-          ISR_table[i].PINSEL_bits = map_MR[j].PINSEL_bits;  // PINSEL register bits to set pin mode to PWM1 control} MR_map;
425
+          ISR_table[i].PCR_bit = map_MR[j].PCR_bit;           // PCR register bit to enable PWM1 control of this pin
426
+          ISR_table[i].PINSEL_reg = map_MR[j].PINSEL_reg;     // PINSEL register address to set pin mode to PWM1 control} MR_map;
427
+          ISR_table[i].PINSEL_bits = map_MR[j].PINSEL_bits;   // PINSEL register bits to set pin mode to PWM1 control} MR_map;
426 428
           map_MR[j].map_used = 2;
427 429
           ISR_table[i].PWM_flag = 0;
428 430
           *map_MR[j].MR_register = ISR_table[i].microseconds;

Loading…
Cancel
Save