marlin

Tree: 2bf11da5ab

Author	SHA1	Message	Date
Scott Lahteine	93cd66ac11	Tweaky change from (C) to (c)	6 years ago
Scott Lahteine	26de051e92	HAL SPI pin init cleanup	6 years ago
Scott Lahteine	3a1b6fe8c1	Coding standards	6 years ago
Scott Lahteine	0feeef2604	Update copyright in headers	6 years ago
etagle	0566badcef	Add memory barrier, optimal interrupt on-off Disabling an ISR on ARM has 3 instructions of latency. A Memory barrier is REQUIRED to ensure proper and predictable disabling. Memory barriers are expensive, so avoid disabling if already disabled (See https://mcuoneclipse.com/2015/10/16/nvic-disabling-interrupts-on-arm-cortex-m-and-the-need-for-a-memory-barrier-instruction/)	7 years ago
Chris Pepper	cc6d41e1d3	Use a macro for HAL header redirection (#10380)	7 years ago
Scott Lahteine	ac368f2788	Add STEPPER_ISR_ENABLED() to HALs Some also get a `HAL_timer_interrupt_enabled` function.	7 years ago
Scott Lahteine	c2b1d51f16	HAL whitespace and style cleanup	8 years ago
Scott Lahteine	2af62a5d8d	Apply spacing, const to some HAL code	8 years ago
teemuatlut	f3e562e46e	HAL for 32-bit Teensy (3.5, 3.6) architecture	8 years ago