My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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timers.cpp 6.1KB

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  1. /**
  2. * Marlin 3D Printer Firmware
  3. *
  4. * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
  5. * SAMD51 HAL developed by Giuliano Zaro (AKA GMagician)
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation, either version 3 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. *
  20. */
  21. #ifdef __SAMD51__
  22. // --------------------------------------------------------------------------
  23. // Includes
  24. // --------------------------------------------------------------------------
  25. #include "../../inc/MarlinConfig.h"
  26. // --------------------------------------------------------------------------
  27. // Local defines
  28. // --------------------------------------------------------------------------
  29. #define NUM_HARDWARE_TIMERS 8
  30. // --------------------------------------------------------------------------
  31. // Private Variables
  32. // --------------------------------------------------------------------------
  33. const tTimerConfig TimerConfig[NUM_HARDWARE_TIMERS+1] = {
  34. { {.pTc=TC0}, TC0_IRQn, TC_PRIORITY(0) }, // 0 - stepper (assigned priority 2)
  35. { {.pTc=TC1}, TC1_IRQn, TC_PRIORITY(1) }, // 1 - stepper (needed by 32 bit timers)
  36. { {.pTc=TC2}, TC2_IRQn, 5 }, // 2 - tone (reserved by framework and fixed assigned priority 5)
  37. { {.pTc=TC3}, TC3_IRQn, TC_PRIORITY(3) }, // 3 - servo (no interrupts used)
  38. { {.pTc=TC4}, TC4_IRQn, TC_PRIORITY(4) }, // 4 - software serial (no interrupts used)
  39. { {.pTc=TC5}, TC5_IRQn, TC_PRIORITY(5) },
  40. { {.pTc=TC6}, TC6_IRQn, TC_PRIORITY(6) },
  41. { {.pTc=TC7}, TC7_IRQn, TC_PRIORITY(7) },
  42. { {.pRtc=RTC}, RTC_IRQn, TC_PRIORITY(8) } // 8 - temperature (assigned priority 6)
  43. };
  44. // --------------------------------------------------------------------------
  45. // Private functions
  46. // --------------------------------------------------------------------------
  47. FORCE_INLINE void Disable_Irq(IRQn_Type irq) {
  48. NVIC_DisableIRQ(irq);
  49. // We NEED memory barriers to ensure Interrupts are actually disabled!
  50. // ( https://dzone.com/articles/nvic-disabling-interrupts-on-arm-cortex-m-and-the )
  51. __DSB();
  52. __ISB();
  53. }
  54. // --------------------------------------------------------------------------
  55. // Public functions
  56. // --------------------------------------------------------------------------
  57. void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {
  58. IRQn_Type irq = TimerConfig[timer_num].IRQ_Id;
  59. // Disable interrupt, just in case it was already enabled
  60. Disable_Irq(irq);
  61. if (timer_num == RTC_TIMER_NUM) {
  62. Rtc * const rtc = TimerConfig[timer_num].pRtc;
  63. // Disable timer interrupt
  64. rtc->MODE0.INTENCLR.reg = RTC_MODE0_INTENCLR_CMP0;
  65. // RTC clock setup
  66. OSC32KCTRL->RTCCTRL.reg = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K; // External 32.768KHz oscillator
  67. // Stop timer, just in case, to be able to reconfigure it
  68. rtc->MODE0.CTRLA.bit.ENABLE = false;
  69. SYNC(rtc->MODE0.SYNCBUSY.bit.ENABLE);
  70. // Mode, reset counter on match
  71. rtc->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE_COUNT32 | RTC_MODE0_CTRLA_MATCHCLR;
  72. // Set compare value
  73. rtc->MODE0.COMP[0].reg = (32768 + frequency / 2) / frequency;
  74. SYNC(rtc->MODE0.SYNCBUSY.bit.COMP0);
  75. // Enable interrupt on compare
  76. rtc->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0; // reset pending interrupt
  77. rtc->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP0; // enable compare 0 interrupt
  78. // And start timer
  79. rtc->MODE0.CTRLA.bit.ENABLE = true;
  80. SYNC(rtc->MODE0.SYNCBUSY.bit.ENABLE);
  81. }
  82. else {
  83. Tc * const tc = TimerConfig[timer_num].pTc;
  84. // Disable timer interrupt
  85. tc->COUNT32.INTENCLR.reg = TC_INTENCLR_OVF; // disable overflow interrupt
  86. // TCn clock setup
  87. const uint8_t clockID = GCLK_CLKCTRL_IDs[TCC_INST_NUM + timer_num]; // TC clock are preceeded by TCC ones
  88. GCLK->PCHCTRL[clockID].bit.CHEN = false;
  89. SYNC(GCLK->PCHCTRL[clockID].bit.CHEN);
  90. GCLK->PCHCTRL[clockID].reg = GCLK_PCHCTRL_GEN_GCLK0 | GCLK_PCHCTRL_CHEN; // 120MHz startup code programmed
  91. SYNC(!GCLK->PCHCTRL[clockID].bit.CHEN);
  92. // Stop timer, just in case, to be able to reconfigure it
  93. tc->COUNT32.CTRLA.bit.ENABLE = false;
  94. SYNC(tc->COUNT32.SYNCBUSY.bit.ENABLE);
  95. // Reset timer
  96. tc->COUNT32.CTRLA.bit.SWRST = true;
  97. SYNC(tc->COUNT32.SYNCBUSY.bit.SWRST);
  98. // Wave mode, reset counter on compare match
  99. tc->COUNT32.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ;
  100. tc->COUNT32.CTRLA.reg = TC_CTRLA_MODE_COUNT32 | TC_CTRLA_PRESCALER_DIV1;
  101. tc->COUNT32.CTRLBCLR.reg = TC_CTRLBCLR_DIR;
  102. SYNC(tc->COUNT32.SYNCBUSY.bit.CTRLB);
  103. // Set compare value
  104. tc->COUNT32.CC[0].reg = (HAL_TIMER_RATE) / frequency;
  105. tc->COUNT32.COUNT.reg = 0;
  106. // Enable interrupt on compare
  107. tc->COUNT32.INTFLAG.reg = TC_INTFLAG_OVF; // reset pending interrupt
  108. tc->COUNT32.INTENSET.reg = TC_INTENSET_OVF; // enable overflow interrupt
  109. // And start timer
  110. tc->COUNT32.CTRLA.bit.ENABLE = true;
  111. SYNC(tc->COUNT32.SYNCBUSY.bit.ENABLE);
  112. }
  113. // Finally, enable IRQ
  114. NVIC_SetPriority(irq, TimerConfig[timer_num].priority);
  115. NVIC_EnableIRQ(irq);
  116. }
  117. void HAL_timer_enable_interrupt(const uint8_t timer_num) {
  118. const IRQn_Type irq = TimerConfig[timer_num].IRQ_Id;
  119. NVIC_EnableIRQ(irq);
  120. }
  121. void HAL_timer_disable_interrupt(const uint8_t timer_num) {
  122. const IRQn_Type irq = TimerConfig[timer_num].IRQ_Id;
  123. Disable_Irq(irq);
  124. }
  125. // missing from CMSIS: Check if interrupt is enabled or not
  126. static bool NVIC_GetEnabledIRQ(IRQn_Type IRQn) {
  127. return (NVIC->ISER[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F))) != 0;
  128. }
  129. bool HAL_timer_interrupt_enabled(const uint8_t timer_num) {
  130. const IRQn_Type irq = TimerConfig[timer_num].IRQ_Id;
  131. return NVIC_GetEnabledIRQ(irq);
  132. }
  133. #endif // __SAMD51__